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2020


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Model-Agnostic Counterfactual Explanations for Consequential Decisions

Karimi, A., Barthe, G., Balle, B., Valera, I.

Proceedings of the 23rd International Conference on Artificial Intelligence and Statistics (AISTATS), 108, pages: 895-905, Proceedings of Machine Learning Research, (Editors: Silvia Chiappa and Roberto Calandra), PMLR, August 2020 (conference)

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arXiv link (url) [BibTex]

2020


arXiv link (url) [BibTex]


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Fair Decisions Despite Imperfect Predictions

Kilbertus, N., Gomez Rodriguez, M., Schölkopf, B., Muandet, K., Valera, I.

Proceedings of the 23rd International Conference on Artificial Intelligence and Statistics (AISTATS), 108, pages: 277-287, Proceedings of Machine Learning Research, (Editors: Silvia Chiappa and Roberto Calandra), PMLR, August 2020 (conference)

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link (url) [BibTex]

link (url) [BibTex]


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A Real-Robot Dataset for Assessing Transferability of Learned Dynamics Models

Agudelo-España, D., Zadaianchuk, A., Wenk, P., Garg, A., Akpo, J., Grimminger, F., Viereck, J., Naveau, M., Righetti, L., Martius, G., Krause, A., Schölkopf, B., Bauer, S., Wüthrich, M.

IEEE International Conference on Robotics and Automation (ICRA), 2020 (conference) Accepted

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Project Page PDF [BibTex]

Project Page PDF [BibTex]

2005


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A dynamical systems approach to learning: a frequency-adaptive hopper robot

Buchli, J., Righetti, L., Ijspeert, A.

In Proceedings of the VIIIth European Conference on Artificial Life ECAL 2005, pages: 210-220, Springer Verlag, 2005 (inproceedings)

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[BibTex]

2005


[BibTex]


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From Dynamic Hebbian Learning for Oscillators to Adaptive Central Pattern Generators

Righetti, L., Buchli, J., Ijspeert, A.

In Proceedings of 3rd International Symposium on Adaptive Motion in Animals and Machines – AMAM 2005, Verlag ISLE, Ilmenau, 2005 (inproceedings)

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[BibTex]

[BibTex]

2004


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Operating system support for interface virtualisation of reconfigurable coprocessors

Vuletic, M., Righetti, L., Pozzi, L., Ienne, P.

In In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, pages: 748-749, IEEE, Paris, France, 2004 (inproceedings)

Abstract
Reconfigurable systems-on-chip (SoC) consist of large field programmable gate arrays (FPGAs) and standard processors. The reconfigurable logic can be used for application-specific coprocessors to speedup execution of applications. The widespread use is limited by the complexity of interfacing software applications with coprocessors. We present a virtualization layer that lowers the interfacing complexity and improves the portability. The layer shifts the burden of moving data between processor and coprocessor from the programmer to the operating system (OS). A reconfigurable SoC running Linux is used to prove the concept.

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link (url) DOI [BibTex]

2004


link (url) DOI [BibTex]